An improved design for baseplates in silicon microsensors reduces parasitic capacitances between adjacent coplanar electrodes. It also reduces thermal-expansion mismatches, which are present in baseplates of older design.
Heretofore, baseplates of silicon microsensors have been made from quartz or ceramic because of concern over parasitic capacitance, which can adversely affect sensor performance. The disadvantage of using quartz or ceramic is that the coefficients of thermal expansion of these materials differ from that of silicon. The thermal-expansion mismatch subjects the sensors to undesired stresses that vary with temperature.
According to the improved design, the baseplate of a silicon microsensor is made from silicon, eliminating the thermal-expansion mismatch. The silicon baseplate (see figure) includes a silicon substrate, a heavily p-doped epilayer, and a thick dielectric layer made of silicon dioxide or silicon nitride. Metal electrodes are deposited on the outer surface of the dielectric layer.
The p+ epilayer serves as an electrically conductive ground plane, which contributes to reduction of the capacitance between the electrodes. The dielectric layer electrically insulates the electrodes from the ground plane. The thickness of the dielectric layer is an important element of the design: The dielectric layer must be as thick as possible, consistently with other design considerations, in order to minimize the capacitance between the electrodes and the ground plane.
This work was done by Roman Gutierrez and Tony K. Tang of Caltech for NASA's Jet Propulsion Laboratory. For further information, access the Technical Support Package (TSP) free on-line at www.nasatech.com/tsp under the Electronics & Computers category.
In accordance with Public Law 96-517, the contractor has elected to retain title to this invention. Inquiries concerning rights for its commercial use should be addressed to
Intellectual Property group
JPL
Mail Stop 202-233
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(818) 354-2240
Refer to NPO-20689, volume and number of this NASA Tech Briefs issue, and the page number.
This Brief includes a Technical Support Package (TSP).
Si Microsensor Baseplates with Low Parasitic Capacitances
(reference NPO-20689) is currently available for download from the TSP library.
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Overview
This document presents an innovative design for baseplates used in silicon microsensors, developed by Roman Gutierrez and Tony K. Tang at NASA's Jet Propulsion Laboratory (JPL). The primary focus of this design is to reduce parasitic capacitances and thermal-expansion mismatches that have historically affected sensor performance.
Traditionally, baseplates for silicon microsensors were made from materials like quartz or ceramic due to concerns over parasitic capacitance. However, these materials have different coefficients of thermal expansion compared to silicon, leading to thermal-expansion mismatches. Such mismatches can introduce unwanted stresses in the sensors as temperatures fluctuate, adversely impacting their functionality.
The improved design utilizes a silicon baseplate, which eliminates the thermal-expansion mismatch issue. The baseplate consists of a silicon substrate, a heavily p-doped epilayer, and a thick dielectric layer made of silicon dioxide or silicon nitride. This configuration is crucial for enhancing sensor performance. The p-doped epilayer acts as an electrically conductive ground plane, which helps reduce capacitance between the metal electrodes deposited on the outer surface of the dielectric layer. The dielectric layer serves to electrically insulate the electrodes from the ground plane, further minimizing parasitic capacitance.
A key aspect of this design is the thickness of the dielectric layer; it must be maximized within the constraints of other design considerations to effectively reduce capacitance between the electrodes and the ground plane. This reduction in capacitance is vital for improving the overall performance of the microsensors.
The document emphasizes that this new baseplate design is applicable to various types of sensors, showcasing its versatility and potential for widespread use in the field of microsensor technology. The work was conducted under the auspices of NASA, and the document includes a notice regarding the retention of title to the invention by the contractor, as well as contact information for inquiries about commercial use.
In summary, this document outlines a significant advancement in the design of silicon microsensor baseplates, addressing critical issues of parasitic capacitance and thermal-expansion mismatches, thereby enhancing the reliability and performance of these sensors in various applications.
