ISAAC (Instrument Shared Artifact for Computing) offers adaptability, computation power, I/O bandwidth, digital interface standards, and data processing capability in a single, common, low-mass/power, and small-form-factor platform with significantly reduced, nonrecurring cost and risk to Earth Science instruments such as SMAP/HYDROS and other NASA/JPL planetary exploration instruments with diverse requirements. This platform has six key components:
- iBoard is a 6U single-board computer with a high-performance Xilinx Virtex 5 FPGA (field programmable gate array) chip with two embedded PowerPC405 processors, over 8 million reprogrammable logic gates, and a complete set of key instrument control and computing capabilities.
- iBus defines a set of compile-time hardware/software interface standards, called iBus-ct, and a run-time communication standard, called iBus-rt, to facilitate easy adaptability and integration of components during the system configuration and operation. iBus-ct unifies iPackage Application Programming Interfaces (APIs), standardizes the iCore interface to external components and the communication bus, organizes data for user applications, and exposes application developers to common FPGA resources. iBus-rt provides a unified integral operating system environment for a complete ISAAC configuration by abstracting FPGA fabric as native computational resources. In particular, it will specify whether the resource meets an application’s requirements, configures and manages the FPGA, detects/handles hardware faults and interrupts, and transfers data between the FPGA fabric and the processors as well as other resources such as read/write to a mass memory file system.
- iCore is composed of a set of standard and parameterized IP cores that implement common, computationally intensive control and computing functions. It is divided into three groups at the top level: iCore-ctl (implements control-related functions such as commands handling, telemetry collection, and time keeping); iCore-ft (implements fault tolerance functions such as detection of Single-Even-Upset-induced errors); and iCore-dsp (implements data processing functions common in instruments such as Fast Fourier Transform, Finite-Impulse Response, Radio-Frequency Interference detection and mitigations, presum, block floating point quantizer, convolution, spatial correlation, data compression, and image feature extraction).
- iPackage is a library of software packages and a run-time kernel that augments iCore to provide a complete instrument control and computing solution.
- iBench is a suite of benchmark instrument data streams for performance validation and tuning of a completely configured system.
- iTool is an integrated tool chain providing a familiar and end-to-end design flow for digital system designers. Various ISAAC components have been developed with applications in various projects.
This work was done by Yutao He, Paula J. Pingree, Pekka P. Kangaslahti, Garth J. Watney, Charles T.C. Le, Xin Zheng, Thomas A. Werne, Hua Zheng, Ian J. O’Dwyer, Duane Clark, Dean Holt, Carson Umsted, Chester Lim, and Kevin Ortega of Caltech for NASA’s Jet Propulsion Laboratory. The software used in this innovation is available for commercial licensing. Please contact Dan Broderick at Daniel.F.
This Brief includes a Technical Support Package (TSP).
Reusable Integrated Instrument Control and Computing Platform
(reference NPO46031) is currently available for download from the TSP library.
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Overview
The document outlines the development and capabilities of ISAAC (Instrument ShAred Artifact for Computing), a highly-reusable and modular integrated instrument control and computing platform created by NASA's Jet Propulsion Laboratory (JPL). The primary objective of ISAAC is to provide a common framework that can be utilized across various Earth Science and Planetary Exploration instruments, significantly reducing costs and duplication in instrument development.
ISAAC is designed to meet diverse instrument requirements as identified in the National Research Council's Decadal Survey Report. It aims to enhance adaptability, computational power, I/O bandwidth, and data processing capabilities while maintaining a low mass and power footprint. The platform is particularly relevant for missions like SMAP and other NASA/JPL planetary exploration instruments.
The ISAAC technology comprises six key components:
- iBoard: An FPGA-based hardware board that offers microprocessor-based computation, control, and data storage, along with various instrument interfaces.
- iCore: A library of Register-Transfer-Level (RTL) Intellectual Property cores for computationally-intensive tasks.
- iPackage: A collection of software functions for non-computationally-intensive tasks.
- iBus: A unified System-on-chip (SoC) bus and interface for hardware and software.
- iBench: A suite of benchmark data streams for performance validation and testing.
- iTool: An integrated tool-chain for end-to-end design flow for digital system designers.
The document highlights significant progress made in the development of ISAAC technology, particularly in FY’10, where the ISAAC prototype (ISAAC III) was successfully developed and delivered. The focus was on creating the custom hardware, iBoard 2, which is designed to have a clear path-to-flight for adoption in various instrument missions. This includes compliance with key development processes such as Technology Readiness Review (TRR) and Subsystem Requirement Review (SRR).
Overall, ISAAC represents a viable turnkey solution for future NASA/JPL instrument missions, promoting efficiency and reusability in instrument design and operation. The document serves as a technical support package under NASA's Commercial Technology Program, aimed at disseminating aerospace-related developments with broader applications.
