Red Rapids, Richardson, TX, introduced the Model 372 FPGA-configurable dual-channel transceiver that features a dual-channel 16-bit analog-to-digital converter (ADC) and dual-channel 16-bit digital-to-analog converter (DAC) clocked at 310 MHz. The converters are coupled to a Xilinx Kintex-7 FPGA that is also connected to high-throughput SRAM. The transceiver is available on a single XMC, CCXMC, or PCI Express half-length form factor board. The SRAM interfaces to the FPGA through separate 18-bit read and write ports to achieve a combined 8 Gbytes/sec data transfer rate.

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NASA Tech Briefs Magazine

This article first appeared in the June, 2016 issue of NASA Tech Briefs Magazine (Vol. 40 No. 6).

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