It has been proposed to equip future microprocessors with electronic cumulative timers, for essentially the same reasons for which land vehicles are equipped with odometers (total-distance-traveled meters) and aircraft are equipped with Hobbs meters (total-engine-operating time meters). Heretofore, there has been no way to determine the amount of use to which a microprocessor (or a product containing a microprocessor) has been subjected. The proposed timers would count all microprocessor clock cycles and could only be read by means of microprocessor instructions but, like odometers and Hobbs meters, could never be reset to zero without physically damaging the chip.
A timer according to the proposal could be either an external device connected to a microprocessor or embedded within the microprocessor. The external implementation could be retrofit to a pre-existing microprocessor. In the external implementation (see figure), the timer would include a prescaler; an inter-integrated-circuit (I2C) or a serial peripheral interface (SPI) module; and a flash random-access memory (RAM) that would store a unique serial number and a prescaler-reduced count of clock cycles, both of which could be read over a one- or two-wire bus.
The serial number stored in the flash RAM would serve as the serial number of the microprocessor and of any equipment containing the microprocessor, for purposes of registering any warranty of the equipment and verifying the authenticity of the equipment. On a display generated by the microprocessor, the user could compare the electronically stored serial number with the serial number printed on a label affixed to the equipment and the serial number on the warranty registration and could read the accumulated operating time. Periodically, during normal operation, the microprocessor would attempt to interrogate the flash memory and would turn itself off if it were unable to read its proper serial number. Upon each such interrogation, the count stored in the flash memory would be incremented.
The internal implementation would function similarly to the external implementation, except that the serial number and the prescaler-reduced count of clock cycles would be stored in either (1) part of the flash RAM used by the rest of the microprocessor or (2) a separate flash RAM dedicated to the timer. It would be necessary to design the microprocessor hardware and software so that there would be no way to decrement the count or otherwise exert external control over the timer flash RAM.
This work was done by John O. Battle of Caltech for NASA’s Jet Propulsion Laboratory. For more information, download the Technical Support Package (free white paper) at www.techbriefs.com/tsp under the Semiconductors & ICs category. In accordance with Public Law 96-517, the contractor has elected to retain title to this invention. Inquiries concerning rights for its commercial use should be addressed to:
Innovative Technology Assets Management
JPL
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Refer to NPO-43599, volume and number of this NASA Tech Briefs issue, and the page number.
This Brief includes a Technical Support Package (TSP).
Cumulative Timers for Microprocessors
(reference NPO-43599) is currently available for download from the TSP library.
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Overview
The document discusses the concept of a microprocessor odometer, a device designed to track the usage and operational history of electronic equipment, similar to how odometers function in cars and Hobbs Meters in airplanes. Authored by John O. Battle from NASA's Jet Propulsion Laboratory (JPL), it highlights the lack of a reliable method to determine the age and usage of electronic devices, particularly when purchasing used equipment like GPS units.
The document outlines two potential implementations for this odometer concept. The first is a stand-alone device that could be integrated into existing microprocessor-based designs. This device would feature a unique serial number and an internal counter that increments each time the device is accessed. The serial number would be displayed on the equipment, allowing users to verify the device's age against warranty registrations. The system would also be designed to halt operation if the odometer is removed, ensuring its integrity.
The second implementation proposes embedding the odometer functionality directly into microprocessor platforms. This approach would either utilize existing FLASH memory or a dedicated FLASH memory that increments the usage count based on the system clock. The design would ensure that there are no means to decrement or clear the counter, thereby maintaining an accurate record of usage.
The document also touches on the market potential for such technology, noting that the microprocessor market was valued at $27.4 billion in 2003, with projections for growth in subsequent years. It suggests that companies like Microchip and Motorola could be potential partners for developing and marketing this technology.
Additionally, the author expresses concern about existing patents for similar devices, indicating a need for careful consideration of intellectual property rights. The document concludes by emphasizing the importance of this technology in providing transparency and reliability in the electronic equipment market, ultimately benefiting consumers and manufacturers alike.
Overall, the document presents a compelling case for the development of cumulative timers for microprocessors, aiming to enhance the understanding of electronic equipment usage and longevity, thereby improving consumer confidence in purchasing decisions.
