The Flexible Peripheral Component Interconnect (PCI) Input/Output (I/O) Card is an innovative circuit board that provides functionality to interface between a variety of devices. It supports user-defined interrupts for interface synchronization, tracks system faults and failures, and includes checksum and parity evaluation of interface data. The card supports up to 16 channels of high-speed, half-duplex, low-voltage digital signaling (LVDS) serial data, and can interface combinations of serial and parallel devices. Placement of a processor within the field programmable gate array (FPGA) controls an embedded application with links to host memory over its PCI bus. The FPGA also provides protocol stacking and quick digital signal processor (DSP) functions to improve host performance. Hardware timers, counters, state machines, and other glue logic support interface communications.
The Flexible PCI I/O Card provides an interface for a variety of dissimilar computer systems, featuring direct memory access functionality. The card has the following attributes:
- 8/16/32-bit, 33-MHz PCI r2.2 compliance,
- Configurable for universal 3.3V/5V interface slots,
- PCI interface based on PLX Technology’s PCI9056 ASIC,
- General-use 512K×16 SDRAM memory,
- General-use 1M×16 Flash memory,
- FPGA with 3K to 56K logical cells with embedded 27K to 198K bits RAM,
- I/O interface: 32-channel LVDS differential transceivers configured in eight, 4-bit banks; signaling rates to 200 MHz per channel,
- Common SCSI-3, 68-pin interface connector.
The Flexible PCI I/O Card was integrated into the Shuttle Mission Simulator (SMS) as a more efficient means of interfacing between the Silicon Graphic Inc. (SGI) simulation host and the Simulator Interface Device (SID). The FPGA was developed to memory map the SID I/O data stream. The card eliminated the previous protocol that required generation of command word and word count I/O data blocks, and added functionality much like direct memory access.
The card was integrated into the Shuttle Avionics Integration Laboratory (SAIL) as an improved interface to the Linux-based Hosting Interface Device (HID). This card allowed replacement of a serial port to parallel data handling, thereby decreasing general-purpose computer (GPC) load times by about 10 minutes.
Finally, the Flexible PCI card was integrated in the SMS, and ready for implementation in the SAIL and to the KSC Avionics Test Set (KATS) Lab, to interface a Windows XP host to a dual channel MIA (media interface adapter) data bus device, providing a means of simulating solid-state mass memory units to load Shuttle general purpose computers (GPCs).
This hardware and firmware work was done by Kirk K. Bigelow and software work was done by Albert L. Jerry, Alisha G. Barcio, and Jon K. Cummings of United Space Alliance for Johnson Space Center. For more information, download the Technical Support Package (free white paper) at www.techbriefs.com/tsp under the Electronics/Computers category. MSC-24615-1
