Monolithic integrated circuits (in particular, Schottky-diode-based frequency multipliers) that operate at frequencies as high as a few terahertz are being developed in a program that utilizes the recent advances in methods of computer-aided design and micro-fabrication. In the approach followed in this program, the active semiconductor devices (GaAs-based Schottky diodes) in a frequency-multiplier circuit are integrated with passive devices (planar metal transmission lines). To reduce radio-frequency losses associated with dielectric layers in the passive circuitry, the semiconductor substrate under the transmission lines is etched away, leaving metal conductors insulated by air and held only by their edges on a semi-conductor frame. The monolithic integration makes the integrated circuit larger (in comparison with discrete circuit components that one would otherwise have to assemble), thereby making the circuit more robust and easier to handle in fabrication and mounting. Metallic beam-leads are used extensively, serving as (1) mechanical handles that facilitate handling and mounting, (2) current paths for dc grounding and biasing of the diodes, and (3) thermal conductors. Moreover, this approach enables the precise positioning of the diodes with respect to the rest of the circuitry and facilitates scaling for operation at higher frequencies.
Following this approach, a frequency multiplier is designed in a three-stage process. In the first stage, one uses (1) a computer program that simulates nonlinear circuits and (2) a computer program that implements a mathematical model of a diode in conjunction with a harmonic-balance- based simulator computer program to optimize the dimensions, doping profile, and number of diodes to be used in the circuit. This stage yields the diode-junction characteristics and embedding impedances that give the best performance.
In the second stage, the input and output impedance-matching transmission line circuits are designed by use of finite-element electromagnetic-simulator software. The numerical output of this software comprises scattering-parameter matrices referenced to diode and transmission- line ports. The matrices plus the embedding impedances computed by the nonlinear-circuit simulator software are then provided as input to linear-circuit simulator software, which is used to analyze the impedance-matching effectiveness of the input and output transmission-line circuits. The parasitics associated with the diode(s) are included in this analysis as part of the passive circuit.
To simplify and speed up the analysis, the passive circuitry is divided into small elements at electromagnetically appropriate points, giving rise to several parameter matrices. Ports are modeled as being attached to probes on each anode so that the individual embedding impedance for each diode can be calculated directly. The diodes are then modeled as being embedded into the resulting cascaded S-parameter matrix blocks to determine the total efficiency and the power performance of the multiplier. If these are unsatisfactory, relative to the intrinsic efficiency and performance of the diodes, the circuit design is iteratively modified to correct for the parasitics found in the simulation.
Standard processing techniques, including stepper lithography and reactive- ion etching, are used to fabricate the diode structures on the front side of a GaAs wafer. The diodes are located on an edge of that portion of the GaAs wafer that is destined to remain as a transmission-line-supporting frame. After front-side processing has been completed, a back-side procedure is used to remove the GaAs under the metal conductors of the input and output transmission lines, except for edge supports as described above.
Thus far, two types of frequency-doubler circuits, designed for output frequencies of 200 and 400 GHz, respectively, have been designed, fabricated, and tested (see figure). Notwithstanding a need for further iteration to optimize design, the results of the tests are encouraging: For example, in a test in which the input frequency ranged from 179 to 212 GHz, one of the 400-GHz units exhibited a peak efficiency and peak power of ≈15 percent and ≈6 mW, respectively, at an output frequency of 369 GHz at room temperature. This represents a new performance record from planar Schottky diode varactors at this frequency.
This work was done by Imran Mehdi, Suzanne Martin, Jean Bruston, Erich Schlecht, and R. P. Smith of Caltech for NASA’s Jet Propulsion Laboratory. For further information, access the Technical Support Package (TSP) free on-line at www.nasatech.com/tsp under the Electronic Compontents and Systems category.
In accordance with Public Law 96-517, the contractor has elected to retain title to this invention. Inquiries concerning rights for its commercial use should be addressed to Refer to NPO-21080, volume and number of this NASA Tech Briefs issue, and the page number. (reference NPO-21080) is currently available for download from the TSP library. Don't have an account? The document presents a technical report on advancements in millimeter and submillimeter-wave circuits developed at the Jet Propulsion Laboratory (JPL) under NASA's sponsorship. It focuses on a novel semiconductor fabrication process that enables the creation of high-frequency monolithic integrated circuits, specifically targeting frequency doublers operating at 200 GHz and 400 GHz. The key innovation discussed is the "substrateless" technology, which integrates passive circuitry with active diodes suspended across an etched semiconductor frame. This approach eliminates the losses typically associated with semiconductor substrates, thereby enhancing the performance of the circuits. The report highlights the successful testing of a 400 GHz doubler, which achieved a peak efficiency of approximately 15% and an output power of 6 mW at an output frequency of 369 GHz. This performance marks a significant milestone in the field, representing the highest power and efficiency reported for varactor doublers in this frequency range. The document outlines the challenges faced in the design and fabrication processes, including the positioning of circuits and variations in machining. These issues have been addressed in subsequent design iterations, leading to improved performance metrics. The report emphasizes the importance of ongoing research aimed at further enhancing the capabilities of these devices, with aspirations to scale the technology for operation in the 700 to 1000 GHz range. Additionally, the report acknowledges the collaborative efforts of the research team, which includes notable contributors from Caltech and JPL. It also clarifies that references to specific commercial products or processes do not imply endorsement by the U.S. Government or JPL. In conclusion, this document serves as a comprehensive overview of the state-of-the-art developments in high-frequency circuit technology, showcasing the potential of substrateless fabrication techniques to revolutionize the design and efficiency of millimeter and submillimeter-wave circuits. The advancements discussed not only pave the way for future innovations in this domain but also highlight the critical role of research and development in achieving breakthroughs in high-frequency applications. Intellectual Property group
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"Subsrateless" Millimeter- and Submillimeter-Wave Circuits
Overview
