Novel architectures based on parallel subconvolution frequency-domain filtering methods have been developed for modular processing rate reduction of discrete-time pulse-shaping filters. Such pulse-shaping is desirable and often necessary to obtain bandwidth efficiency in very-high-rate wireless communications systems. In principle, this processing could be implemented in very-large-scale integrated (VLSI) circuits. Whereas other approaches to digital pulse-shaping are based primarily on time-domain processing concepts, the theory and design rules of the architectures presented here are founded on frequency-domain processing that has advantages in certain systems.

A major advantage of parallel processing of signal data, whether for shaping pulses or other purposes, is that the data rate in each of the parallel streams is much lower than the overall data rate. This makes it possible to use processing circuitry that is slower than what would be needed to process all of the data in a single stream. In particular, it becomes possible to use complementary metal oxide semiconductor (CMOS) circuitry instead of faster and more expensive GaAs-based circuitry. The present frequency-domain approach to parallel processing offers the following additional advantages:

  • Certain processing architectures are arbitrarily scalable, such that filter orders and reductions in processing rates can be chosen independently of each other without altering FFT-IFFT lengths. While this is generally true in time-domain approaches, it has not, heretofore, been the case in frequency-domain approaches without altering FFT-IFFT lengths.
  • Under many circumstances using the frequency-domain approach entails fewer computations per filtered output than time-domain counterparts. Therefore, fewer transistors and/or lower power consumption may result from such an implementation.
  • The ability to manipulate phase and frequency bands in the frequency-domain approach may have advantages in some systems employing time-varying predistortion filtering.

The Subconvolution Filtering Architecture represented by this diagram is an example for a case of decimation by 4 (1/4th rate processing) and a pulse-shaping filter of order k. The symbol "Ø4" represents decimation by 4, the H quantities are frequency-domain filter coefficients, and the z–1 signifies a delay equal to one input sample period.
The theory and design rules incorporate new and simple subconvolution filtering methods as well as prior developments in discrete-time signal processing, multirate filtering, and general linear-systems theory. The theoretical derivation begins with the subdivision of a time-domain convolution into a number of subconvolutions. The subconvolutions are recast as combinations of subsampling (decimation) in parallel, variously delayed streams to obtain parallel-processable pairs of specialized discrete Fourier transforms (SDFTs) and their inverses (SIDFTs) (see figure). The specialization lies in the elimination of redundant and unnecessary computations by (1) skipping over terms that are known to be identically zero and (2) exploiting the fact that in the frequency-domain representation of the desired filter response, each negative-frequency component is the complex conjugate of the corresponding positive-frequency component. Additional simplifications are made on the basis of the (upsampled) nature of the input signal. Modularization and expanded parallel operation can be effected by splitting the filtering across multiple blocks.

This work was done by Andrew A. Gray of Caltech for NASA's Jet Propulsion Laboratory. For further information, access the Technical Support Package (TSP) free on-line at www.techbriefs.com/tsp under the Computers/Electronics category.

NPO-30186

Topics:
Architecture Communication systems Electronics & Computers Energy consumption Telecommunications Wireless communication systems
This Brief includes a Technical Support Package (TSP).
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Modular, Parallel Pulse-Shaping Filter Architectures

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NASA Tech Briefs Magazine

This article first appeared in the August, 2003 issue of NASA Tech Briefs Magazine (Vol. 27 No. 8).

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Overview

The document presents a technical report on novel modular parallel pulse-shaping architectures developed by NASA's Jet Propulsion Laboratory (JPL). The focus is on frequency-domain filtering methods that enhance bandwidth efficiency in very-high-rate wireless communication systems. Traditional digital pulse-shaping techniques primarily rely on time-domain processing, but this report introduces a frequency-domain approach that offers several advantages.

One of the key innovations is the ability to implement arbitrarily scalable processing architectures. This means that both the filter order and the processing rate can be adjusted independently without altering the lengths of the Fast Fourier Transform (FFT) and Inverse Fast Fourier Transform (IFFT). This flexibility is a significant advancement over previous frequency-domain approaches, which typically required changes to FFT-IFFT lengths when modifying filter orders or processing rates.

The report highlights the benefits of parallel processing, where the data rate in each parallel stream is significantly lower than the overall data rate. This reduction allows for the use of slower and less expensive complementary metal oxide semiconductor (CMOS) circuitry instead of faster, more costly gallium arsenide (GaAs) circuitry. Additionally, the frequency-domain approach generally requires fewer computations per filtered output compared to time-domain methods, leading to lower power consumption and reduced transistor counts.

The architectures discussed are designed to simplify the processing circuits by exploiting the properties of filters and signals. This simplification is particularly beneficial for very large scale integration (VLSI) implementations, which are crucial for modern digital modulators. The report emphasizes that the proposed methods can achieve significant power savings and design complexity reductions, especially for large filter orders (greater than approximately 30).

In summary, the document outlines a significant advancement in pulse-shaping filter architectures that leverage frequency-domain processing for improved efficiency and scalability. The work aims to facilitate the development of cost-effective, high-performance communication systems by simplifying circuit design and reducing processing requirements. The findings are expected to have a substantial impact on the field of digital signal processing and wireless communications.