The Real-Time Interferometer Control Systems Testbed (RICST) timing board is a VersaModule Eurocard (VME)-based board that can generate up to 16 simultaneous, phase-locked timing signals at a rate defined by the user. It can also generate all seven VME interrupt requests (IRQs). The RICST timing board is suitable mainly for robotic, aerospace, and real-time applications.
Several circuit boards on the market are capable of generating periodic IRQs. Most are associated with Global Positioning System (GPS) receivers and Inter Range Instrumentation Group (IRIG) time-code generators, whereas this board uses either an internal VME clock or an externally generated clock signal to synchronize multiple components of the system. The primary advantage of this board is that there is no discernible jitter in the output clock waveforms because the signals are divided down from a high-frequency clock signal instead of being phase-locked from a lower frequency. The primary disadvantage to this board, relative to other periodic-IRQ-generating boards, is that it is more difficult to synchronize the system to wall clock time.
The RICST System Timing Board (see figure) includes 16 programmable digital output channels, seven of which can also be enabled to drive VME IRQ lines 1 through 7. The signals in all 16 output channels are differential transistor/transistor-logic (TTL)-level square waves, at frequencies defined by the user, that are coupled out via ribbon-cable connectors mounted on a front panel. Optional hardware can be added to the board, so that six of the channels can generate analog outputs in addition to the standard digital outputs (e.g., sine waves instead of square waves). Most of the functions of the board are performed by a programmable logic device, with additional circuitry for controlling the VMEbus interface and output signals.
This work was done by Elizabeth McKenney and Philip Irwin of Caltech for NASA's Jet Propulsion Laboratory. For further information, access the Technical Support Package (TSP) free on-line at www.techbriefs.com/tsp under the Computers/Electronics category.NPO-21248
This Brief includes a Technical Support Package (TSP).
A Timer for Synchronous Digital Systems
(reference NPO-21248) is currently available for download from the TSP library.
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Overview
The document outlines the technical specifications and functionalities of a VME-Based 16-Channel Programmable Clock/Interrupt Generator Board developed by the Jet Propulsion Laboratory (JPL) under NASA contract NAS 7-918. This board is designed to enhance real-time systems by providing precise timing signals necessary for synchronous operations.
Historically, real-time systems relied on timers available on CPU boards to generate interrupts. However, this new board integrates this functionality with the capability to synchronize various components of a system, addressing the need for a "heartbeat" signal that ensures all parts operate in unison at exact intervals. The board can produce up to 16 simultaneous, phase-locked signals at user-defined rates, making it versatile for various applications.
The document details the board's functions, including output channels, synchronization, watchdog capabilities, and timestamp generation. It also provides insights into programming the timing board, covering aspects such as register addressing, control/status registers, and channel control registers. The board's architecture is based on an Altera Programmable Logic Device (PLD), which facilitates its digital output channels and other features like clock selection and interrupt acknowledgment.
The technical support package includes a revision log, indicating the document's evolution and updates over time, with the latest modifications made in 2000. The document emphasizes that references to specific commercial products or manufacturers do not imply endorsement by the U.S. Government or JPL.
Overall, this document serves as a comprehensive technical resource for understanding the capabilities and applications of the VME-Based 16-Channel Programmable Clock/Interrupt Generator Board, highlighting its significance in advancing real-time system performance in aerospace and other high-precision fields.
