A modification in a method of automated evolutionary synthesis of voltage controlled multifunctional logic circuits makes it possible to synthesize more circuits in less time. Prior to the modification, the computations for synthesizing a four-function logic circuit by this method took about 10 hours. Using the method as modified, it is possible to synthesize a six function circuit in less than half an hour.
The concepts of automated evolutionary synthesis and voltage-controlled multifunctional logic circuits were described in a number of prior NASA Tech Briefs articles. To recapitulate: A circuit is designed to perform one of several different logic functions, depending on the value of an applied control voltage. The circuit design is synthesized following an automated evolutionary approach that is so named because it is modeled partly after the repetitive trial-and-error process of biological evolution. In this process, random populations of integer strings that encode electronic circuits play a role analogous to that of chromosomes. An evolved circuit is tested by computational simulation (prior to testing in real hardware to verify a final design). Then, in a fitness-evaluation step, responses of the circuit are compared with specifications of target responses and circuits are ranked according to how close they come to satisfying specifications. The results of the evaluation provide guidance for refining designs through further iteration.
As described in more detail in the prior NASA Tech Briefs articles on multifunctional logic circuits, the multiple functionality of these circuits, the use of a single control voltage to select the function, and the automated evolutionary approach to synthesis, offer potential advantages for the further development of field-programmable gate arrays (FPGAs):
- Typical circuitry can be less complex and can occupy smaller areas; because only a single analog control line is needed to select different functions.
- If voltage-controlled multifunctional gates were used in the place of the configurable logic blocks of present commercial FPGAs, it would be possible to change the functions of the resulting digital systems in much shorter times;
- Relative to conventional circuits designed to perform single functions, multifunctional circuits can be synthesized to be more tolerant of radiationinduced faults.
In the unmodified method of automated evolutionary synthesis, the target responses of a multifunctional logic circuit are fixed: that is, the user specifies in advance which logic function the circuit is to perform at each of several discrete values of control voltage (for example, AND at 0 V, NOR at 0.9 V, and NAND at 1.8 V). In the modified method, the user no longer specifies which logic function occurs at which control voltage: Instead, the evolutionary algorithm is allowed to find the control-voltage levels at which various logic functions appear, and the fitness-evaluation function is modified to assign a higher fitness score to a circuit that exhibits a greater number of logic functions over the full range of the control voltage. Thus, evolution is driven to find circuits that perform a larger number of logic functions.
In order to be able to score fitness in this way, one must ensure that circuit output is a digital waveform at every value of the control voltage, so that the output can be classified as a particular logic function. Nevertheless, it has been observed that the circuits generated during evolutionary search typically generate analog outputs, taking values between zero volts and the power-supply voltage. In order to solve this problem, the output of an evolving circuit is digitized by use of a buffer, as illustrated in the figure. Whereas the direct output of the evolving circuit is evaluated in the unmodified method, the buffered output is evaluated in the modified method. In effect, for the purpose of evaluation, the buffer becomes part of any such evolved circuit.
This work was done by Adrian Stoica and Ricardo Zebulum of Caltech for NASA’s Jet Propulsion Laboratory. For further information, access the Technical Support Package (TSP) free on-line at www.techbriefs.com/tsp under the Semiconductors & ICs category. NPO-40934
This Brief includes a Technical Support Package (TSP).
Faster Evolution of More Multifunctional Logic Circuits;
(reference NPO-40934) is currently available for download from the TSP library.
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Overview
The document is a Technical Support Package from NASA's Jet Propulsion Laboratory, detailing advancements in the evolution of multifunctional logic circuits. It introduces a new methodology that enhances the synthesis of circuits capable of implementing multiple logic functions, such as AND, OR, NAND, NOR, and XOR, using a compact design that significantly reduces the number of transistors required.
The new technique builds upon an original methodology based on Evolutionary Algorithms, where each circuit design is represented by a "genetic code" or chromosome. The process begins with generating a random population of these chromosomes, which are then simulated to evaluate their performance against specified target responses. In the original approach, the target logic functions were fixed, meaning the user had to define which function would be activated at specific control voltage levels.
The innovative aspect of the new technique is its flexibility in fitness evaluation. Instead of imposing fixed logic functions, the artificial evolution process can now determine the control voltage values at which different logic functions will be activated. This allows for a more dynamic and efficient synthesis of circuits, enabling them to switch functionalities rapidly—some circuits can change functions in less than one microsecond.
The document highlights the advantages of this new method, including a reduction in the number of transistors used—approximately 50% less compared to conventional digital libraries. For instance, a circuit that would typically require 46 transistors can now be implemented with just 19. This compactness not only saves space but also maintains competitive performance in terms of speed and power dissipation.
However, the technique does have limitations. Users cannot specify the functionality for a particular control voltage, which may restrict certain applications. Despite this, the primary goal remains to create circuits that can implement a variety of logic functions, making them suitable for use in Field Programmable Gate Arrays (FPGAs) and other applications.
Overall, this document outlines a significant advancement in logic circuit design, emphasizing the potential for broader technological applications and the benefits of using evolutionary techniques in circuit synthesis. Further discussions and details on specific circuit implementations are anticipated in future publications.
