Researchers are following two approaches in an effort to improve the low-noise performances of InP-based high-electron-mobility transistors (HEMTs) that could be used as front-end amplifiers in millimeter-wave receivers. These devices are designed to operate while cooled to temperatures ≤ 20 K, where they function with high gain, low leakage, and the lowest noise levels of any transistors operating in the millimeter-wavelength range. However, the low-noise performances of these devices are still slightly below those of nontransistor state-of-the-art devices.
The two approaches to improvement are best explained with the help of a cross-sectional view of a typical InGaAs/InAlAs/InP HEMT (see figure). The first approach involves increasing the indium content, x, of the InxGa1 – xAs channel layer, which is grown by molecular-beam epitaxy. Increasing x results in enhanced electron-transport properties, which translate to higher cutoff frequency and higher gain. Unfortunately, increasing x also increases the strain in the InxGa1 –xAs layer with respect to the InP substrate; as a result, the thickness of the InxGa1 – xAs must not be allowed to grow beyond a maximum critical thickness that decreases with increasing x. The thickness of the channel layer is important because the thickness of the quasi two-dimensional gas in this layer determines the quantum electron states and the confinement and density of electrons in the channel. If the channel is too thin, then the performance of the device is degraded.
In this research, devices are fabricated with channels of x = 0.60, 0.65, and 0.80 and corresponding thicknesses. In the case of the x = 0.80 channel, the indium content is not uniformly 0.80; instead, it is graded to a maximum of 0.80 to minimize the strain and thereby make it possible to grow the thickest possible channel layer while benefitting from the transports with the highest feasible x.
The second approach involves reduction of the gate length from 0.1 µm to ≤ 0.07 µm. Reduction of the gate length causes a reduction of internal capacitances, leading to lower noise, higher cutoff frequency, and higher gain. For example, decreasing the gate length to 0.07 µm can increase the cutoff frequency by as much as 25 percent.
There are two challenges to reduction of gate length. The first challenge is the difficulty of developing a high-yield manufacturing process to build 0.07-µm gates. Even electron-beam state-of-the-art electron lithography has thus far been limited to features with dimensions ≥ 0.1 µm. The second challenge is a short-channel effect; if the gate is too short, it cannot effectively pinch off the channel. This short-channel effect can severely limit device yield in mass production.
Both approaches have been followed in the fabrication of HEMTs in a dedicated 8-wafer lot split for the various indium compositions and gate lengths. The information gained from the devices on these wafers has provided insight on how to build the ultimate cryogenic millimeter-wave solid amplifier.
This work was done by Richard Lai of TRW Inc. for NASA's Jet Propulsion Laboratory. For further information, access the Technical Support Package (TSP) free on-line at www.nasatech.com/tsp under the Electronics & Computers category. NPO-20341
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Two approaches to improvement of InGa/InA1As/InP HEMTs
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Overview
The document titled "Two Approaches to Improvement of InGaAs/InAlAs/InP HEMTs" presents research conducted by Richard Lai at TRW Inc. for NASA’s Jet Propulsion Laboratory, focusing on enhancing the low-noise performance of InP-based high-electron-mobility transistors (HEMTs). These transistors are essential components in millimeter-wave receivers, particularly for applications requiring ultra-low noise performance.
The research outlines two primary approaches to improve HEMTs: optimizing the indium content and thickness of the channel layer, and reducing the gate length from 0.1 μm to ≤ 0.07 μm. The reduction in gate length is significant as it leads to decreased internal capacitances, resulting in lower noise levels, higher cutoff frequencies, and increased gain. Specifically, shortening the gate length to 0.07 μm can enhance the cutoff frequency by up to 25%. However, this approach presents challenges, including the difficulty of developing a high-yield manufacturing process for such small gate dimensions and the short-channel effect, which can hinder the transistor's ability to effectively pinch off the channel, potentially limiting device yield in mass production.
The document emphasizes the importance of these advancements in the context of cryogenic applications, where HEMTs are cooled to very low temperatures (around 0 K) to achieve optimal performance. Previous work has shown that InP-based HEMTs exhibit promising low-noise characteristics at these temperatures, and the current research aims to extend these capabilities through new designs that incorporate higher indium compositions and shorter gate lengths.
The findings from the fabrication of HEMTs in a dedicated 8-wafer lot split for various indium compositions and gate lengths have provided valuable insights into the development of high-performance cryogenic millimeter-wave solid amplifiers. The document concludes by noting that while the new device designs hold potential for superior cryogenic low-noise performance, further investigation is needed to confirm these benefits.
Overall, this research represents a significant step forward in the development of advanced semiconductor technologies, with implications for various high-frequency applications in telecommunications and space exploration.
