An improved technique, and electronic circuitry to implement the technique, have been developed for a military-standard electromagnetic-compatibility (EMC) test in which one analyzes susceptibility to low-frequency ripple conducted into the equipment under test via a DC power line. In the traditional technique for performing the particular test, the ripple is coupled onto the DC power line via a transformer. Depending upon some design details of the equipment under test, the inductance of the transformer can contribute a degree of instability that results in an oscillation of amplitude large enough to destroy the equipment.
It is usually possible to suppress the oscillation by connecting a damping resistor to the primary terminals of the ripple-injection transformer. However, it is important to emphasize the "usually" in the preceding sentence: sometimes, the resistive damping becomes insufficient to suppress destructive oscillation. In addition, undesirably, the resistor contributes to power dissipation and power demand, and thereby also necessitates the use of a larger ripple-voltage amplifier. Yet another disadvantage of the transformer-coupling technique is that the transformer introduces low-frequency distortion of the injected ripple voltage.
The improved technique makes it possible to inject ripple with very low distortion at low frequency, without inducing oscillation. In this technique, a transformer is not used: Instead, power is fed to the equipment under test via series power field-effect transistors (FETs) controlled by a summing operational amplifier. One of the inputs to the amplifier controls the DC component of the power-line voltage; the other input, generated by an external oscillator, controls the ripple component. The circuitry for implementing this technique includes panel displays, an internal power supply for the operational amplifier and panel displays, and amplitude controls for the DC and ripple power-line voltage components.
This work was done by Vatche Vorperian of Caltech for NASA's Jet Propulsion Laboratory. For more information, download the Technical Support Package (free white paper) at www.techbriefs.com/tsp under the Electronics/Computers category.
NPO-30652
This Brief includes a Technical Support Package (TSP).

Maintaining Stability During a Conducted-Ripple EMC Test
(reference NPO-30652) is currently available for download from the TSP library.
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Overview
The document is a Technical Support Package from NASA’s Jet Propulsion Laboratory (JPL), identified as NPO-30652, focusing on maintaining stability during conducted-ripple electromagnetic compatibility (EMC) tests. It addresses the challenges associated with low-frequency power line ripple conducted susceptibility testing, specifically under the guidelines of MIL-STD-461, which is crucial for ensuring the reliability of aerospace systems.
The primary concern highlighted in the document is the potential violation of the "Middlebrook Stability Criterion" during testing, which can lead to runaway oscillations that may damage or destroy the test article. This issue has been encountered at JPL in the past, particularly with test articles that have varying power requirements. The document recounts two incidents where the damping resistor solution was insufficient, prompting the need for a more robust testing method.
To resolve this problem, the document proposes a novel solution that eliminates the use of transformer injection methods, which introduce additional reactance that can compromise stability. Instead, it suggests employing a current modulation scheme to achieve the desired testing objectives without risking instability. The proposed solution involves the use of series power field-effect transistors (FETs) controlled by a summing operational amplifier. This setup allows for precise control of the desired DC voltage and includes an amplitude-controlling stage for an external oscillator to generate the required frequency.
Additional features of the system include a cooling fan, an internal power supply for the operational amplifier, panel displays, and controls for both DC and AC ripple voltage amplitudes. These enhancements aim to improve the reliability and effectiveness of the EMC testing process.
The document also references a related work titled “Potential Damage to Flight Hardware from MIL-STD-462 CS02 Setup” by Patrick K. Harris and Nathan F. Block, which may provide further insights into the issues addressed.
Overall, this Technical Support Package serves as a valuable resource for aerospace engineers and researchers, offering innovative solutions to enhance the stability and reliability of EMC testing in aerospace applications. For further inquiries or assistance, contact information for JPL’s Innovative Technology Assets Management is provided.

