"Hybrid imaging technology" (HIT) is the name of a discipline in which the advancement of electronic image sensors is pursued via hybridization of charge-coupled-device (CCD) and complementary metal oxide/semiconductor (CMOS) circuitry. The guiding principle of HIT is to combine CCD and CMOS components into units that afford capabilities that neither CCD nor CMOS circuitry can provide by itself. HIT can be applied to advantage in almost any situation in which there are requirements for very high imaging quality and low power dissipation. Applications can include portable video and portable digital still cameras, remote surveillance cameras, and low-power cameras in spaceborne and terrestrial scientific instrumentation.
HIT merges the exceptional quantum efficiencies, fill factors, broad spectral responses, and very low noise levels of CCDs with the low power levels, system-integration capabilities, and low costs of CMOS-based active-pixel sensor (APS) circuits to create the next generation of high-performance image sensors. Some of the related research outside HIT has included attempts to merge CCD and CMOS components at the device-fabrication-process level. Although these attempts have yielded working image sensors, the devices have exhibited poor image quality and high noise because of lack of optimization of CMOS processes. In turn, the lack of optimization has been due to a basic incompatibility between CCD and CMOS processes as they relate to processing temperatures and to required oxide thicknesses for CMOS transistors.
An essential element of the HIT approach is that no attempt is made to unite CCD and CMOS devices at the device-fabrication-process level; instead, the CCD and CMOS components of a given device are fabricated in separate CCD and CMOS processes and then joined mechanically and electrically (hybridized) by bump bonding. This element of HIT makes it possible to avoid costly process development. This approach also makes it possible to optimize the CCD and the CMOS parts independently, in such a way as to maximize the overall performance of the resulting image sensor in a highly miniaturized format.
Another advantage of HIT is that it enables the reuse of CCD imaging devices and CMOS readout circuitry without need for costly refabrication. A supply of unhybridized components can be maintained so that combinations of components can be selected to satisfy requirements in specific applications.
The imager integrated-circuit chip of an HIT image sensor is essentially a CCD chip, except that the on-chip amplifier usually found in such a device has been replaced by either a floating diffusion or a floating gate output node. The companion CMOS chip must contain a charge-to-voltage conversion amplifier similar to an operational amplifier configured as a charge integrator. Depending on the application, the CMOS chip could also contain additional circuitry to perform such functions as correlated double sampling and analog-to-digital conversion. Matching bump-bond pads are formed on the CCD imager and CMOS chips during their respective fabrication processes. Indium bumps are deposited on the pads, and the chips are joined by standard bump-bonding techniques.
This work was done by Mark V. Wadsworth of Caltech for NASA's Jet Propulsion Laboratory. NPO-20542
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Hybrid imaging technology
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Overview
The document discusses Hybrid Imaging Technology (HIT), a next-generation imaging technology developed at NASA's Jet Propulsion Laboratory (JPL) to enhance imaging performance for scientific applications. HIT merges the strengths of charge-coupled devices (CCD) and complementary metal oxide semiconductor (CMOS) technologies through a hybridization process rather than attempting to unify them at the fabrication level. This approach allows for the independent optimization of CCD and CMOS components, resulting in superior image quality and performance.
CCD technology is known for its exceptional performance, including high quantum efficiency, low readout noise, and broad spectral response, making it the preferred choice for demanding scientific applications. However, CCDs require significant power and lack on-chip signal processing capabilities. Conversely, CMOS imagers offer low power consumption and the ability to integrate additional functions, such as digitization and multiplexing, directly on the chip. Unfortunately, CMOS technology suffers from low quantum efficiency and high fixed pattern noise.
HIT addresses these limitations by combining the high-quality imaging characteristics of CCDs with the low power and integration capabilities of CMOS. The HIT imager consists of a CCD chip with a modified output node and a companion CMOS chip that includes a charge-to-voltage conversion amplifier and additional signal processing circuitry. The two chips are connected using standard bump-bonding techniques, allowing for a compact and efficient design.
The document highlights the advantages of HIT, including the ability to maintain a supply of unhybridized components for flexibility in meeting specific application requirements, as well as the potential for significant mass reduction in camera systems. The first prototype of the HIT detector, featuring a 256 by 512 element imaging array, has demonstrated scientific-quality performance with a charge transfer efficiency greater than 0.99999, low noise levels, and minimal power consumption.
Overall, HIT represents a significant advancement in imaging technology, providing a solution that combines the best features of CCD and CMOS while overcoming their individual drawbacks. This innovative approach is poised to enhance imaging capabilities across various scientific and commercial applications, making it a valuable development in the field of imaging technology.
