A reactive-ion etching (RIE) process for smoothing a silicon substrate has been devised. The process is especially useful for smoothing those silicon areas that have been exposed by etching a pattern of holes in a layer of silicon dioxide that covers the substrate. Applications in which one could utilize smooth silicon surfaces like those produced by this process include fabrication of optical waveguides, epitaxial deposition of silicon on selected areas of silicon substrates, and preparation of silicon substrates for deposition of adherent metal layers.
During etching away of a layer of SiO2 that covers an Si substrate, a polymer becomes deposited on the substrate, and the substrate surface becomes rough (roughness height ≈ 50 nm) as a result of over-etching or of deposition of the polymer. While it is possible to smooth a silicon substrate by wet chemical etching, the undesired consequences of wet chemical etching can include compromising the integrity of the SiO2 sidewalls and undercutting of the adjacent areas of the silicon dioxide that are meant to be left intact.
The present RIE process results in anisotropic etching that removes the polymer and reduces height of roughness of the silicon substrate to <10 nm while leaving the SiO2 sidewalls intact and vertical. Control over substrate versus sidewall etching (in particular, preferential etching of the substrate) is achieved through selection of process parameters, including gas flow, power, and pressure. Such control is not uniformly and repeatably achievable in wet chemical etching. The recipe for the present RIE process is the following:
Etch 1 — A mixture of CF4 and O2 gases flowing at rates of 25 to 75 and 75 to 125 standard cubic centimeters per minute (stdcm3/min), respectively; power between 44 and 55 W; and pressure between 45 and 55 mtorr (between 6.0 and 7.3 Pa). The etch rate lies between ≈3 and ≈6 nm/minute.
Etch 2 — O2 gas flowing at 75 to 125 stdcm3/min, power between 44 and 55 W, and pressure between 50 and 100 mtorr (between 6.7 and 13.3 Pa).
This work was done by Tasha Turner and Chi Wu of Caltech for NASA's Jet Propulsion Laboratory. For further information, access the Technical Support Package (TSP) free on-line at www.techbriefs.com/tsp under the Materials category.
In accordance with Public Law 96-517, the contractor has elected to retain title to this invention. Inquiries concerning rights for its commercial use should be addressed to
Intellectual Property group
JPL
Mail Stop 202-233
4800 Oak Grove Drive
Pasadena, CA 91109
(818) 354-2240
Refer to NPO-20777, volume and number of this NASA Tech Briefs issue, and the page number.
This Brief includes a Technical Support Package (TSP).
Process for Smoothing an Si Substrate After Etching of SiO2
(reference NPO-20777) is currently available for download from the TSP library.
Don't have an account?
Overview
The document presents a technical support package from NASA's Jet Propulsion Laboratory (JPL) detailing a novel reactive-ion etching (RIE) process aimed at smoothing silicon substrates after the etching of silicon dioxide (SiO2). The process addresses the common issue of surface roughness that occurs when a silicon substrate is exposed during the etching of a SiO2 layer, which can lead to roughness heights of approximately 50 nm due to polymer deposition and over-etching.
The RIE process developed by Tasha Turner and Chi Wu is particularly advantageous because it achieves anisotropic etching, effectively removing the polymer buildup while maintaining the integrity of the SiO2 sidewalls. This is a significant improvement over traditional wet chemical etching methods, which can compromise the vertical profile of the sidewalls and lead to undercutting of the SiO2 pattern.
The document outlines the specific parameters for the RIE process, which includes two distinct etching steps. The first etch involves a mixture of CF4 and O2 gases, with flow rates of 25 to 75 and 75 to 125 standard cubic centimeters per minute (sccm), respectively, along with a power range of 44 to 55 watts and a pressure of 45 to 55 mtorr. The etch rate during this step is approximately 3 to 6 nm/min. The second etch uses pure O2 gas at similar power and pressure settings, further refining the substrate surface.
The outcome of this RIE process is a significant reduction in surface roughness to less than 10 nm, making it suitable for high-precision applications such as the fabrication of optical waveguides and the deposition of adherent metal layers on silicon substrates. The document emphasizes the control over etching parameters, which allows for selective etching of the substrate while preserving the desired features of the SiO2 sidewalls.
Overall, this innovative RIE technique represents a substantial advancement in semiconductor processing, providing a reliable method for achieving smooth silicon surfaces essential for various technological applications. The work is protected under intellectual property rights, and inquiries regarding commercial use are directed to JPL's Intellectual Property group.
