The addition of special-purpose signal-processing circuitry has been proposed to overcome some of the deleterious effects of hardware faults in integrated-circuit image sensors of active-pixel-sensor (APS) type and possibly of other types. The mathematical basis of the method is median filtering in a small neighborhood (typically of 3 × 3 or 5 × 5 pixels) centered, in turn, on each pixel; that is, one seeks to replace the intensity signal for each pixel with the median-intensity signal for its neighborhood. From the perspective of a human observer viewing the image on a remote video display, such median filtering would reduce or eliminate the visible effects of malfunctioning single pixels or of malfunctioning rows or columns of single-pixel width - the faults most commonly observed in large state-of-the-art integrated-circuit image sensors. Thus, the effective production yields of the image sensors would be enhanced.

Heretofore, neighborhood median filtering has usually been implemented by software in the first stage of processing of digitized pixel signals. In the proposed method, the median filtering would be implemented in hardware; more specifically, by use of additional electronic circuitry that would be installed on the periphery of the image-sensor area. In comparison with the software implementation, the proposed hardware implementation would offer the advantage of reduced computational burden and possibly greater processing speed.

Median-Intensity Values would be stored in a three-row buffer, then found for pixels in adjacent 3 × 3 neighborhoods along the middle row in the buffer. A three-phase cycle, with incrementing of the column locations by one step in each phase, would be necessary to obtain all the median values for the row in question.

The figure shows a simplified layout for implementing median filtering in 3× 3 neighborhoods. The intensity signals from pixels would be read out row by row and initially stored in a three-row buffer. Each cycle of operation would begin with reading signals from a new row into the buffer, accompanied by dropping the signals from the oldest row from the buffer. Units containing analog circuits with timed, transistor-switched, access to adjacent 3 ×3 neighborhoods in the buffer would then identify and pass on the median intensity signals from these neighborhoods. These units would operate on each group of three rows in three phases as follows:

During the first phase, the units would put out the median values associated with the middle row in the buffer and with the columns in the numerical sequence 2, 5, 8, and so forth. In the third phase, columns in question would be those in the numerical order 3, 6, 9, and so forth. In the third phase, the columns in question would be those in the numerical order 4, 7, 10, and so forth. Upon completion of the third phase, all available median values for the middle row in the buffer would have been generated. Then a new cycle would begin with loading of a new row into the buffer and with the row loaded on the previous cycle becoming the new middle row.

This work was done by Orly Yadid-Pecht, Barmuk Mansoorian, and Bedabrata Pain of Caltech for NASA's Jet Propulsion Laboratory. NPO-20211



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Filtering to increase effective yields of image sensors

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NASA Tech Briefs Magazine

This article first appeared in the October, 1999 issue of NASA Tech Briefs Magazine (Vol. 23 No. 10).

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Overview

The document discusses a novel approach to enhancing the effective fabrication yield of image sensors, particularly focusing on active-pixel-sensor (APS) types. As imaging systems demand larger sensor arrays, the challenges associated with fabrication yield, such as bad pixels, rows, or columns, become more pronounced. These defects can significantly degrade image quality and increase costs.

To address these issues, the authors propose incorporating special-purpose signal-processing circuitry that performs median filtering directly on the sensor chip. Traditionally, median filtering—a technique that replaces a pixel's intensity with the median intensity of its neighboring pixels—has been implemented in software after image capture. This method, while effective, can introduce latency and computational burdens, especially in real-time applications.

The proposed hardware implementation aims to reduce these drawbacks by performing median filtering on-chip. By focusing on a 3x3 pixel neighborhood, the circuit can effectively eliminate the visible effects of malfunctioning pixels, rows, or columns, which are the most common defects in large sensor arrays. This approach not only enhances image quality but also improves the overall yield of the sensors, making them more cost-effective.

The document highlights the advantages of this hardware-based median filtering over traditional software methods, including reduced processing time and lower computational demands. By integrating this functionality into the sensor design, manufacturers can achieve better performance and reliability in their imaging systems.

In summary, the document presents a significant advancement in image sensor technology by proposing a circuit-based solution to improve yield and image quality through median filtering. This innovation is particularly relevant for large-format sensors, where yield issues are most critical. The authors emphasize that this method could lead to more efficient image processing and enhanced user experience in various applications, from consumer electronics to advanced imaging systems used in scientific and industrial settings.