A method, now undergoing development, of forming nanochannels in planar substrates is intended to enable the fabrication of advanced fluidic devices that could be integrated with complementary metal oxide semiconductor (CMOS) electronic circuits. Such integral combinations of fluidic and electronic components ("laboratory-on-a-chip" devices) could be used, for example, to detect individual molecules of deoxyribonucleic acid (DNA) and proteins. The width of a channel in such a device would be chosen so that molecules of the species of interest would move along the channel in single file.
In addition to being intended to enable the tailoring of the width of each channel to a uniform value of the order of several nanometers, the developmental method is intended to satisfy the following other requirements:
- A channel must be optically transparent when viewed along a line perpendicular to the plane of the substrate;
- The process of formation of the channels must be compatible with CMOS circuitry and with the processes of fabrication of CMOS circuitry;
- Relative to processes that have been used to fabricate devices containing microchannels, this process must be simple.
In this method, the fabrication of channels includes the use of such CMOS-compatible processes as chemical-mechanical polishing and oxide deposition. The layout of the channels in the substrate plane is determined by a single photolithographic process, but it is not a nanoscale lithographic process, and this process is not relied upon to define the thickness and width of the channels. Stating it from a slightly different perspective, unlike in the prior fabrication of electronic and fluidic devices involving the use of lithography to define microscale features, this process does not include the use of lithography to define nanoscale features. It is this aspect of the method that enables simplification of the process and, hence, a decrease in cost.
A typical fabrication process according to this method includes, among other things, thermal oxidation to form a layer of SiO2 on a silicon substrate, followed by deposition of a layer of Si3N4, followed by deposition of a first layer of polycrystalline silicon (poly-Si). The depth of the channel(s) is determined by the thickness of the first poly-Si layer. The width of the channels (see figure) is determined by the thickness of the SiO2 layer, which thickness is readily controllable and can be made extremely uniform.
This work was done by Choonsup Lee and Eui-Hyeok Yang of Caltech for NASA's Jet Propulsion Laboratory.
In accordance with Public Law 96-517, the contractor has elected to retain title to this invention. Inquiries concerning rights for its commercial use should be addressed to:
Innovative Technology Assets Management
JPL
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4800 Oak Grove Drive
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Refer to NPO-30678.
ORIGINAL URL - /Briefs/Feb04/NPO30678.html
This Brief includes a Technical Support Package (TSP).

Fabrication of Channels for Nanobiotechnological Devices.
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Overview
This document presents a novel method for fabricating multi-nanochannels using Chemical Mechanical Polishing (CMP) for applications in nanobiotechnology. Developed by researchers at NASA's Jet Propulsion Laboratory, the technology addresses the growing demand for nano-scale channels that can facilitate the detection of individual DNA molecules and proteins, thereby enhancing the capabilities of lab-on-a-chip devices.
The key components of the proposed nanofluidic system include channels, mixers, pumps, and nano-scale interconnections to external tubing. Among these, the nano-scale channel is highlighted as the most critical element. The required specifications for these nanochannels include adjustability in dimensions (on the order of several nanometers), uniformity and reliability, fabrication feasibility for arbitrary shapes, transparency, CMOS compatibility, and simplicity in the fabrication process.
The innovation lies in the fabrication technology that utilizes CMOS-compatible planar semiconductor processes, such as chemical-mechanical polishing and oxide deposition, without the need for nano-scale lithography equipment. This approach simplifies the fabrication process and reduces costs while allowing for high throughput integration with CMOS readout circuits. The diameter of the channels can be easily adjusted by modifying oxidation parameters, ensuring uniformity due to the nature of thermally grown oxide.
Previous methods for channel fabrication, such as bonding ceilings on defined trenches or using sacrificial layers, have limitations in controllability, uniformity, and integration feasibility into lab-on-a-chip systems. The proposed CMP and oxidation process overcomes these challenges by providing reliable and uniform nanochannel fabrication, capable of producing channels several centimeters in length.
The document emphasizes the novelty of this approach, which not only meets the stringent requirements for nanochannel fabrication but also enhances the potential for applications in genetic diagnostics and other areas of nanobiotechnology. By enabling the precise control of channel dimensions and facilitating the integration of nanochannels with electronic systems, this technology represents a significant advancement in the field, paving the way for more effective and efficient diagnostic tools and research methodologies in nanobiotechnology.

